Prafulkumar Kharade – Portfolio

Prafulkumar Arun Kharade

Electrical Engineer | Python Developer | VLSI Design Enthusiast

Explore My Work

About Me

I am an Electrical Engineer currently pursuing my Master’s at the University of Texas at Dallas. I specialize in Python scripting, VLSI design, and digital systems, with hands-on experience in ASIC design flow, UVM verification, and automation. I am passionate about solving real-world problems through hardware and software integration.

Skills

Programming Languages

  • Python
  • Verilog / SystemVerilog
  • C
  • Shell Scripting

Tools

  • ModelSIM
  • Cadence Virtuoso
  • Xilinx ISE
  • Synopsys

Design & Testing

  • VLSI Design
  • UVM Verification
  • ASIC Design Flow
  • Digital System Design

Projects

16-Bit UART Serial Communication

Developed a 16-bit UART protocol using Verilog for reliable data exchange in ASIC design flow, optimized for timing and performance.

SystemVerilog FIFO & I2C Verification

Designed a UVM-based verification environment for FIFO and I2C systems, using randomized stimulus for accurate test coverage.

APB RAM UVM Verification

Created UVM-based test benches for APB RAM, improving verification efficiency and ensuring design functionality.

Contact Me

If you’d like to discuss a project or have any questions, feel free to reach out to me!

prafulkharade28@gmail.com
LinkedIn

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